Opus Configuration

Created by Israel Alejandro Fernández Gutiérrez, Modified on Fri, 21 Jun 2024 at 03:31 PM by Israel Alejandro Fernández Gutiérrez

1.      RF Communication Configuration

a.      Compliant with GEN2V2

 

2.      Optional Commands Supported

a.      Access

b.      Untraceable

c.       Authenticate

d.      ReadBuffer

e.      Select EPC to turn on LED

f.        Select StoredPC to turn on LED

g.      Write to turn on LED

h.      Select to measure battery voltage

i.        Select to measure temperature

j.        Write to measure temperature

k.       Select to measure OCRSSI (On-chip RSSI)

l.        Select EPC to request BAP (Battery Assisted Passive) communication mode

m.    Write to request BAP communication mode  

 

3.      Commands to Request BAP Communication Mode

a.      Initially when Opus loggers are just out of factory, in order to preserve battery capacity, the battery is not connected to the logger, and the logger is a Passive communication device being powered by the RF field.

b.      To connect the battery with the logger so that the logger can be operating in the BAP communication mode, a BAP communication mode request command must be modulated and sent to the logger by a GEN2V2 reader.

c.       Opus loggers support two types of BAP mode request commands:

                                                             i.      Select EPC to request BAP communication mode command: this command follows the syntax for a GEN2V2 reader’s mandatory command Select, but with the following exceptions for the MemBank, Pointer, Length, and Mask parameters. When the logger’s entire EPC code matches the Mask, the Select command will be executed.

 

MemBank

2 Bits

Pointer

EBV 16 Bits

Length

8 Bits

Mask

11b

0x8140

Logger’s EPC length

 Logger’s EPC code

 

                                                           ii.      Write command to request BAP communication mode: this command follows the syntax for a GEN2V2 reader’s mandatory command Write, but with the following exceptions for the MemBank, WordPtr, and Data parameters.

 

MemBank

2 Bits

Pointer

EBV 8 Bits

Data

16 Bits

10b

0x40

Don’t Care 0xXXXX

 

                                                         iii.      The battery and logger connection status can be checked by reader reading the 16-bit StoredPC word at word address 0x01 of the EPC memory bank. See the Chapter for Logger Configuration in EPC Bank below.

 

4.      Key Definitions

a.      TID Custom Logger Configuration Block 1

                                                             i.      An 18-word memory block in the TID memory bank with word addresses from 0x08 to 0x19

b.      TID Custom Logger Configuration Block 2

                                                             i.      A 16-word memory block in the TID memory bank with word addresses from 0x30 to 0x3F

c.       User Custom Logger Configuration Block

                                                             i.      A 16-word memory block in the User memory bank with word addresses from 0x0010 to 0x001F

d.      Arm the Opus logger

                                                             i.      Arming the logger is defined as completing all the tasks below successfully

1.      Configure the logger, which can be accomplished either in BAP (Battery Assisted Passive) mode or in Passive mode except for Writing the 32-bit UTC timestamp.

2.      Successful execution of Command to request BAP communication mode if it hasn’t been done yet.

3.      In BAP mode, write the UTC timestamp to the memory locations pointed to by RTC Address which is configured during the logger configuration. The higher 16 bits of the UTC timestamp is written first to the word pointed to by RTC Address, and the lower 16 bits of the UTC timestamp is written next to the word pointed to by RTC Address + 1.

4.      The automatic built-in on-chip initial measurement of the battery voltage must be greater than Initial Battery Voltage configured during the logger configuration

                                                           ii.      Arming the logger is an irreversible operation. Once the logger is armed, it can not be unarmed and then rearmed.

 

5.      Passwords and Private AES Keys

a.      Write 32-bit Access Password

                                                             i.      On the least secure level, portions of Opus logger memory will be automatically Write locked via Access Password protection mechanism for Memory Bank EPC and TID, and the User Custom Logger Configuration Block of User bank.

                                                           ii.      The AES keystore in the Reserved bank will be automatically Write perma locked if its protection-enable configuration bit, Permalock AES Keys, in the TID bank (bit 6 of word 0x1F of TID Bank) is set to 1. This configuration bit inherits the Write lock status of the TID bank. The logger configuration will be described in the following sections.

                                                         iii.      A zero Access Password is equivalent to no Access Password.

                                                         iv.      Lock/Perma Lock Access Password?

b.      Write 32-bit Kill Password

                                                             i.      A zero Kill Password will not kill Opus loggers

                                                           ii.      Lock/Perma Lock Kill Password?

c.       Write 128-bit AES Encryption Key

                                                             i.      8 words of the Reserved bank from word address 0x08 to 0x0F are for storing the AES Encryption key. The AES Encryption Key is not readable by any reader.

 

Memory

Bank

Word

Address

AES Encryption Key

Note

 

 

 

Reserved

0x0F

AES_ENC_KEY [15:0]

These words are not readable by any reader, and can be write permalocked by an authorized reader

0x0E

AES_ENC_KEY [31:16]

0x0D

AES_ENC_KEY [47:32]

0x0C

AES_ENC_KEY [63:48]

0x0B

AES_ENC_KEY [79:64]

0x0A

AES_ENC_KEY [95:80]

0x09

AES_ENC_KEY [111:96]

0x08

AES_ENC_KEY [127:112]

 

d.      Write 128-bit CMAC key

                                                             i.      8 words of the Reserved bank from word address 0x10 to 0x17 are for storing the AES CMAC key. The AES CMAC Key is not readable by any reader.

 

 

 

 

Memory

Bank

Word

Address

AES CMAC Key

Note

 

 

 

Reserved

0x17

AES_CMAC_KEY [15:0]

These words are not readable by any reader, and can be write permalocked by an authorized reader

0x16

AES_CMAC_KEY [31:16]

0x15

AES_CMAC_KEY [47:32]

0x14

AES_CMAC_KEY [63:48]

0x13

AES_CMAC_KEY [79:64]

0x12

AES_CMAC_KEY [95:80]

0x11

AES_CMAC_KEY [111:96]

0x10

AES_CMAC_KEY [127:112]

 

6.      Logger Configuration in EPC Bank

a.      Write 16-bit StoredPC to word address 0x01

16-bit GEN2V2 protocol control information is stored in EPC’s StoredPC word at word address 0x01.

 

Bits [15:11]:  5 L bits (EPC length field) are written by the reader. The maximum EPC length for the Opus logger is 01101b. L bits are subject to the Lock status of the EPC bank, but the Untraceable command may alter them if the reader has the Access Password privilege.

Bits [10]: UMI bit (User Memory Indicator) is fixed to 1 by the Opus manufacturer.   

Bits [9]: XPC_W1 Indicator is computed by the Opus logger

Bits [8]: T (numbering system identifier toggle) bit is written by the reader subject to the Lock status of the EPC bank   

Bits [7:5]: Logger State bits are computed by the Opus logger; these 3 bits represent the state information of the Opus logger.

Bits [4]: Battery Install bit is computed by the Opus logger; this bit is set to 1 if battery is installed on the Opus logger.

Bits [3]: RTC Powered bit is computed by the Opus logger; this bit is set to 1 if on-chip RTC is being powered by the battery.

Bits [2]: Temperature Alarm bit is written automatically by the Opus logger as a mirror image of Oring the two Temperature Alarm bits of the SSD block. The reader can also write it (for example, to clear it during logger configuration) subject to the Lock status of the EPC bank.  

Bits [1]: Battery Alarm bit is written automatically by the Opus logger as a mirror image of the Battery Alarm bit of the SSD block. The reader can also write it (for example, to clear it during logger configuration) subject to the Lock status of the EPC bank.

Bits [0]: Tamper Alarm bit is written automatically by the Opus logger as a mirror image of the Tamper Alarm bit of the SSD block. The reader can also write it (for example, to clear it during logger configuration) subject to the Lock status of the EPC bank. 

 

Word Address

Bits

[15:11]

Bit

[10]

Bit

[9]

Bits

[8]

Bits

[7:5]

Bit

[4]

Bit

[3]

Bit

[2]

Bit

[1]

Bit

[0]

 

0x01

 

< 01110b Written

1b

UMI bit

Fixed

 

XI bit

Computed

1b

T bit

Written

Logger

State

Computed

Battery

Installed

Computed

RTC

Powered

Computed

0b

Temp

Alarm

Written

0b

Battery

Alarm

Written

0b

Tamper

Alarm

Written

 

b.      Write 16-bit XPC_W1 to word address 0x21

XPC_W1 (Extended Protocol Control Word 1) is located at word address 0x21.

 

Bit [15]: XEB (XPC_W2 Indicator) bit is computed by the Opus logger

Bit [14]: RFU bit and fixed to 0 by the Opus manufacturer

Bit [13:12]: MIIM (Mobile RFID Content Name Indicator) bits are reserved for ISO/IEC 29143, and are writable by the reader subject to the Lock status of the EPC bank

Bit [11]: Initial Battery Alarm bit indicates if the initial measurement of the battery voltage is below the Initial Battery Voltage. This Initial Battery Alarm bit is written automatically by the Opus logger, and the reader can also write it (for example, to clear it during logger configuration) subject to the Lock status of the EPC bank.

Bit [10]: SS (Simple Sensor) bit is writeable by the reader subject to the Lock status of the EPC bank.

Bit [9]: FS (Full Sensor) bit is writeable by the reader subject to the Lock status of the EPC bank.

Bit [8]: RFU bit and fixed to 0 by the Opus manufacturer

Bit [7]: B (Battery Assisted Passive Indicator) bit is computed by the Opus logger

Bit [6]: C (Computed Response Indicator) indicates if ResponseBuffer contains a response, and is computed by the Opus logger

Bit [5]: SLI (SL Flag Indicator) bit indicates if the SL flag is asserted, and is computed by the Opus logger  

Bit [4]: TN (Notification Indicator) bit is fixed to 0 by the Opus manufacturer

Bit [3]: U (Untraceable Indicator) bit indicates if the Opus logger is untraceable, and is writeable by the reader subject to the Lock status of the EPC bank, but the Untraceable command may alter the bit if the reader has the Access Password privilege.

Bit [2]: K (Killable Indicator) bit indicates if the logger can be killed, and is computed by the Opus logger

Bit [1]: NR (Nonremovable Indicator) bit indicates if the Opus logger is removable from its host item, and is writeable by the reader subject to the Lock status of the EPC bank.

Bit [0]: H (Hazmat Indicator) bit indicates if the item to which the Opus logger is attached is hazardous, and is writeable by the reader subject to the Lock status of the EPC bank.

 

Word Address

Bits

[15]

Bit

[14]

Bit

[13:12]

Bit

[11]

Bit

[10]

Bit

[9]

Bit

[8]

 

0x21

0b

XEB bit

Computed

0b

RFU bit

Fixed

 

MIIM bits

Written

0: No alarm

1: Alarm

Initial Battery Alarm bit

Written

1b

SS bit

Written

0b

FS bit

Written

0b

RFU bit

Fixed

 

Word Address

Bits

[7]

Bit

[6]

Bit

[5]

Bit

[4]

Bit

[3]

Bit

[2]

Bit

[1]

Bit

[0]

 

0x21

0: No BAP mode

1: BAP mode

 B bit

Computed

0: No Response

1: Response

 C bit

Computed

0: De-asserted

1: Asserted

 SL Flag bit

Computed

0b

TN bit

Fixed

0: Traceable

1: Untraceable

U bit

Written

0: Not killable

1: Killable

K bit

Computed

0: Removable

1: Attached

NR bit

Written

0: No hazmat

1: Hazmat

H bit

Written

 

7.      Logger Configuration in TID Bank

a.      Write 32-bit RTC Address to word addresses 0x28 and 0x29. The RTC address is a pointer that points to the lower word address of a pair of consecutive memory words where the 32-bit UTC timestamp is recorded immediately before the Opus logger is armed. 

                                                             i.      Word 0x28: [15:10] = 000000b, [9:8] = Memory Bank=10b (TID) or 11b (User), [7:0] = RTC Address [23:16]

 

Word Address

Bits [15:10]

Bits

[9:8]

Bits

[7:0]

0x28

000000b

10b/11b

RTC Address [23:16]: 0x00

 

                                                           ii.      Word 0x29: [15:0] = RTC Address [15:0]. RTC Address [5:0] must point to the lower word address of 2 consecutive memory words inside one of the 3 Custom Logger Configuration Blocks of the memory bank configured at word address 0x28.

 

Word Address

Bits [15:6]

Bits

[5:0]

0x29

RTC Address [15:8]: 0x000

RTC Address [5:0]

 

b.      Write 16-bit Number of Samples to Log and Custom Configuration Address to word address 0x1A

                                                             i.      Number of Samples to Log allows 8 different choices in increments of 512 samples

The 7 words below are for logger configuration, and their addresses in their respective address fields are relative to the base address of the first word which is specified by Word 0x004A of TID

                                                           ii.      Custom Configuration Address points to the first word of 7 consecutive 16-bit words, all inside one of the 3 Custom Logger Configuration Blocks of the memory bank configured by Bits [9:8]. The configuration of these 7 words is specified in “Configuration of the 7 Consecutive Custom Configuration Words inside Custom Logger Configuration Blocks”

                                                         iii.      Bits [15:13]: RFU; Bits [12:10]: Number of Samples to Log; Bits [9:8]: Memory Bank; Bits [7:0]: Custom Configuration Address

 

Word Address

Bits [15:13]

Bits

[12:10]

Bits

[9:8]

Bits

[7:6]

Bits

[5:0]

 

 

 

0x1A

 

 

 

000b

000b:  512

001b: 1024

010b: 1536

011b: 2048

100b: 2560

101b: 3072

110b: 3584

111b: 4096

 

 

 

10b: TID

  11b: User

 

 

 

00b

Must be inside one of the 3 Custom Logger Configuration Blocks of the memory bank set by Bits [9:8]

 

c.       Configuration of the 7 Consecutive Custom Configuration Words inside Custom Logger Configuration Blocks

                                                             i.      Custom Configuration Address points to the 1st word of the 7 Consecutive Custom Configuration Words.

                                                           ii.      The 1st word is for Proprietary Logger Configuration which configures Photodiode Current, Finger Spot Device, Antitamper Sensor, and Custom Sampling Regime Override.

Bits [15:14]: Photodiode Current setting to adjust the light exposure intensity for the Anti-Tamper Sensor. We recommend 10b: 400nA for the current version of the Anti-Tamper Sensor.

Bit [13]: Finger Spot Log Start Polarity determines whether to open or close a switch on the Logger to begin the logging process. With the Finger Spot mechanism present and enabled, The Opus logger won’t start temperature logging immediately after it is armed, and it waits until the Fing.




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